In chip manufacturing, multiple dies are fabricated on a single semiconductor wafer. These dies are then separated and packaged into individual chips, each having a number of integrated circuits (ICs). In order to keep track of each die during the manufacture process and beyond, each die may be assigned a unique identifier (die-ID) while on its wafer, and each wafer may be assigned to a lot. Certain additional data corresponding to the dies (e.g., product, grade, etc.) may be combined with their respective die-IDs provide additional die information.
Tracing information is useful for tracking each individual die's history of operation(s), carrier used for its transportation, the lot it belonged to at various times, etc. For example, if a die later proves unreliable, it is beneficial to identify the source of the die and to determine how and when the die unit was manufactured, in order to aid the semiconductor manufacturer in improving its manufacturing processes.
The inventors have recognized that the spatial position (e.g., X and Y) of a die in a wafer is a crucial piece of information in process traceability for root cause analysis of characterization issues, production yield loss, qualification failures, and customer returns. A known technique for obtaining and storing location information is to write that information during a wafer probe test operation, for example, into a non-volatile memory (NVM) element of the die itself. This information can be electrically accessed after device is packaged, and it is commonly referred as “electrical die-ID.”
As the inventors have also recognized, however, the aforementioned technique presents a number of drawbacks. First, silicon area needs to be allocated in the die for identification, in cases when traceability is needed after manufacturing. Added die area increases cost of goods sold (COGS) for the product. Design and test engineering investment is needed to implement the technique in each device, which increases the cost of new product development. Second, probe testing is required. Third, because information is stored electrically, it is only possible to extract it when communication with the device's NVM is successful. Failure mechanisms such as die-crack, physical damage, wire bond failures, broken leads, electrical overstress, defects in power supply or reference blocks that prevent power-up of a device, etc. can make it impossible to read traceability information from the NVM. Fourth, non-volatile or other storage mechanisms require extra mask layers, which increases the wafer manufacturing cost. Due to these, and other limitations, electrical die-ID methods are only used in a few types of devices.